diff options
| author | Wim Taymans <wim.taymans@collabora.co.uk> | 2009-08-19 19:50:42 +0200 |
|---|---|---|
| committer | Wim Taymans <wim.taymans@collabora.co.uk> | 2009-08-20 11:31:04 +0200 |
| commit | 078bde1b49a11f6c76e47fea19f9d920a45ce3f1 (patch) | |
| tree | 6596fcc0d4f7d171f3c402da69fdeca0121ed017 /src/pulsecore | |
| parent | 370016c0e73236830513a9ea9c16366c15bd30a2 (diff) | |
x86: keep the cpu flags local
Diffstat (limited to 'src/pulsecore')
| -rw-r--r-- | src/pulsecore/cpu-x86.c | 57 |
1 files changed, 27 insertions, 30 deletions
diff --git a/src/pulsecore/cpu-x86.c b/src/pulsecore/cpu-x86.c index 2da31c92..453ecf5b 100644 --- a/src/pulsecore/cpu-x86.c +++ b/src/pulsecore/cpu-x86.c @@ -45,12 +45,11 @@ get_cpuid (uint32_t op, uint32_t *a, uint32_t *b, uint32_t *c, uint32_t *d) } #endif -static pa_cpu_x86_flag_t pa_cpu_x86_flags; - void pa_cpu_init_x86 (void) { #if defined (__i386__) || defined (__amd64__) uint32_t eax, ebx, ecx, edx; uint32_t level; + pa_cpu_x86_flag_t flags = 0; /* get standard level */ get_cpuid (0x00000000, &level, &ebx, &ecx, &edx); @@ -58,25 +57,25 @@ void pa_cpu_init_x86 (void) { get_cpuid (0x00000001, &eax, &ebx, &ecx, &edx); if (edx & (1<<23)) - pa_cpu_x86_flags |= PA_CPU_X86_MMX; + flags |= PA_CPU_X86_MMX; if (edx & (1<<25)) - pa_cpu_x86_flags |= PA_CPU_X86_SSE; + flags |= PA_CPU_X86_SSE; if (edx & (1<<26)) - pa_cpu_x86_flags |= PA_CPU_X86_SSE2; + flags |= PA_CPU_X86_SSE2; if (ecx & (1<<0)) - pa_cpu_x86_flags |= PA_CPU_X86_SSE3; + flags |= PA_CPU_X86_SSE3; if (ecx & (1<<9)) - pa_cpu_x86_flags |= PA_CPU_X86_SSSE3; + flags |= PA_CPU_X86_SSSE3; if (ecx & (1<<19)) - pa_cpu_x86_flags |= PA_CPU_X86_SSE4_1; + flags |= PA_CPU_X86_SSE4_1; if (ecx & (1<<20)) - pa_cpu_x86_flags |= PA_CPU_X86_SSE4_2; + flags |= PA_CPU_X86_SSE4_2; } /* get extended level */ @@ -85,38 +84,36 @@ void pa_cpu_init_x86 (void) { get_cpuid (0x80000001, &eax, &ebx, &ecx, &edx); if (edx & (1<<22)) - pa_cpu_x86_flags |= PA_CPU_X86_MMXEXT; + flags |= PA_CPU_X86_MMXEXT; if (edx & (1<<23)) - pa_cpu_x86_flags |= PA_CPU_X86_MMX; + flags |= PA_CPU_X86_MMX; if (edx & (1<<30)) - pa_cpu_x86_flags |= PA_CPU_X86_3DNOWEXT; + flags |= PA_CPU_X86_3DNOWEXT; if (edx & (1<<31)) - pa_cpu_x86_flags |= PA_CPU_X86_3DNOW; + flags |= PA_CPU_X86_3DNOW; } pa_log_info ("CPU flags: %s%s%s%s%s%s%s%s%s%s", - (pa_cpu_x86_flags & PA_CPU_X86_MMX) ? "MMX " : "", - (pa_cpu_x86_flags & PA_CPU_X86_SSE) ? "SSE " : "", - (pa_cpu_x86_flags & PA_CPU_X86_SSE2) ? "SSE2 " : "", - (pa_cpu_x86_flags & PA_CPU_X86_SSE3) ? "SSE3 " : "", - (pa_cpu_x86_flags & PA_CPU_X86_SSSE3) ? "SSSE3 " : "", - (pa_cpu_x86_flags & PA_CPU_X86_SSE4_1) ? "SSE4_1 " : "", - (pa_cpu_x86_flags & PA_CPU_X86_SSE4_2) ? "SSE4_2 " : "", - (pa_cpu_x86_flags & PA_CPU_X86_MMXEXT) ? "MMXEXT " : "", - (pa_cpu_x86_flags & PA_CPU_X86_3DNOW) ? "3DNOW " : "", - (pa_cpu_x86_flags & PA_CPU_X86_3DNOWEXT) ? "3DNOWEXT " : ""); + (flags & PA_CPU_X86_MMX) ? "MMX " : "", + (flags & PA_CPU_X86_SSE) ? "SSE " : "", + (flags & PA_CPU_X86_SSE2) ? "SSE2 " : "", + (flags & PA_CPU_X86_SSE3) ? "SSE3 " : "", + (flags & PA_CPU_X86_SSSE3) ? "SSSE3 " : "", + (flags & PA_CPU_X86_SSE4_1) ? "SSE4_1 " : "", + (flags & PA_CPU_X86_SSE4_2) ? "SSE4_2 " : "", + (flags & PA_CPU_X86_MMXEXT) ? "MMXEXT " : "", + (flags & PA_CPU_X86_3DNOW) ? "3DNOW " : "", + (flags & PA_CPU_X86_3DNOWEXT) ? "3DNOWEXT " : ""); /* activate various optimisations */ - if (pa_cpu_x86_flags & PA_CPU_X86_MMX) { - pa_volume_func_init_mmx (pa_cpu_x86_flags); + if (flags & PA_CPU_X86_MMX) { + pa_volume_func_init_mmx (flags); } - if (pa_cpu_x86_flags & PA_CPU_X86_SSE) { - pa_volume_func_init_sse (pa_cpu_x86_flags); + if (flags & PA_CPU_X86_SSE) { + pa_volume_func_init_sse (flags); } -#else - pa_cpu_x86_flags = 0; -#endif +#endif /* defined (__i386__) || defined (__amd64__) */ } |